From: rick@cs.arizona.edu (Rick Schlichting) Subject: INDUSTRY: Kahaner Report: Fifth Generation Computer System (FGCS) summary Date: 2 Jun 1993 12:26:08 -0700 Organization: University of Arizona CS Department, Tucson AZ Crossposted from comp.research.japan [Dr. David Kahaner is a numerical analyst on sabbatical to the Office of Naval Research-Asia (ONR Asia) in Tokyo from NIST. The following is the professional opinion of David Kahaner and in no way has the blessing of the US Government or any agency of it. All information is dated and of limited life time. This disclaimer should be noted on ANY attribution.] [Copies of previous reports written by Kahaner can be obtained using anonymous FTP from host cs.arizona.edu, directory japan/kahaner.reports.] From: Dr. David K. Kahaner US Office of Naval Research Asia (From outside US): 23-17, 7-chome, Roppongi, Minato-ku, Tokyo 106 Japan (From within US): Unit 45002, APO AP 96337-0007 Tel: +81 3 3401-8924, Fax: +81 3 3403-9670 Email: kahaner@cs.titech.ac.jp Re: Fifth Generation Computer System (FGCS) summary 1 June 1993 This file is named "fgcs.93" ABSTRACT. A summary of the Fifth Generation Computer System Project and planned follow on project. I have written several reports about the Fifth Generation Computer System (FGCS) Project, sometimes also called the ICOT project, see for example "icot.kl1", 28 Feb 1992, "icot.692", "fgcs.toc", 22 June 1992, and 4 June 1992, especially the last for my general evaluation. However, I still receive many questions. A recent issue of the Japan Computer Quarterly, No 93, March 1993, contains an excellent English summary of the project, written by Prof Koichi Furukawa of Keio University. JCQ is published by Japan Information Processing Development Center (JIPDEC) 3-5-8 Shibakoen, Minato-ku Tokyo 105 Japan Tel: +81 3 3432-9384; Fax: +81 3 3432-9389 and individual copies of this issue can be obtained by contacting the address above. Below, I extract some key details and some summary information. Mr Yuji Yamadori, JIPDEC's Director for Research & International Affairs presents a brief description of the project from MITI's viewpoint and a very general discussion of the future. Following that is an overview by Prof Furukawa, including budgets. I have omitted the details concerning the specific research results, which have been frequently reported. Finally, Prof Furukawa gives some additional details on future plans. Yamadori... The word "generation" is frequently used to express progress made in the computer field, especially in relation to hardware. In other words, in accordance with the elements used to build computers, computers using vacuum tubes were called the first generation, those based on transistors and diodes the second generation, those adopting ICs the third generation, and those built using LSIs the third and a half generation. Since today's computers use VLSIs as elements on a large scale, it is said that computers have now entered a fourth generation. Computers have developed rapidly ever since the announcement of the first general- purpose computer using a built-in program system, and processing speed has also increased considerably along with innovations in element technology. However, conventional computers have all been based on the von Neumann theory, and theory has essentially followed in its footsteps, even up to the present. The Ministry of International Trade and Industry has implemented various measures to improve computer technology in Japan. In the mid-1970's, MITI requested JIPDEC to carry out a basic investigation into the research and development of an epoch-making computer that would mark a significant departure from past theory and technology. To do this, JIPDEC decided to carry out investigations and research for a three year period starting in 1979 with cooperation from industry, academia, and government. For this investigation, JIPDEC established a research committee composed of researchers and specialists from universities, governmental and industrial laboratories, and users, and held active discussions in a wide range of fields, such as basic technical theory, the conditions of the social environment, and computer architecture. With expectations for the advent of a new generation computer, this computer was called the next generation computer, that is, the "Fifth Generation Computer". The results of this three-year investigation were reported to the government and were made public at an international symposium to an audience of Japanese and overseas specialists. The results were evaluated highly by the government, and in 1982, the government decided to establish an "Institute for New Generation Computer Technology (ICOT)" through joint investment with private enterprise to promote this project. The Fifth Generation Computer Project was established as a long-term plan extending over about 10 years. The project had achieved the desired objectives to a certain extent by the end of March, 1992 and was brought to a close in March, 1993 after one year of final unification, evaluation, and improvement work. Japan learned many things from the major industrialized countries at the dawn of the computer age, and today's Japanese computer technology was fostered based on this knowledge. Making a contribution internationally through the execution of this new kind of project was an important role for Japan. Therefore, at the start of the Fifth Generation Computer Project, MITI widely appealed to overseas research institutes for involvement in the project. At the same time, interim results from the project were made public externally by holding international symposiums as necessary. To promote smooth execution of the project, JIPDEC dispatched many engineers to ICOT to offer their cooperation. AI played an important role in this project in the research of basic theory, etc. Regarding AI, trial introduction of expert systems has become popular in private enterprise, but it has been pointed out that AI cannot be expected to spread further because development techniques have not yet been established. Therefore, ICOT and JIPDEC established an ICOT-JIPDEC AI Center in 1986 to investigate, study, and disseminate AI technology. Its specific accomplishments include The publication of "The AI Vision", and "The AI White Paper", etc., and the sponsorship of various lectures and seminars. The research and development phase of the Fifth Generation Computer Project was completed at the end of March, 1993, but the propagation of its results will continue to be important from now on. Therefore, for a period of two years starting in April, 1993 JIPDEC will make efforts to disseminate the parallel knowledge processing technology fostered in the project. The history of research and development of the project, an outline of its results, and the prospects for the future, etc. will be introduced in this issue to commemorate the completion of the Fifth Generation Computer Project. In drawing up this summary, we received full scale cooperation from ICOT. We would like to use this opportunity to acknowledge this support, and we hope this report will be of help to our readers. Furukawa.... Overview of the FGCS Project 1. Preliminary Study Stage for the FGCS Project The circumstances prevailing during the preliminary stage of the FGCS Project, from 1979 to 1981, can be summarized as follows: Japanese computer technologies had reached the level where they are now among the most up-to-date overseas computer technologies. A change of the role of the Japanese national project for computer technologies was being discussed whereby there would be a move away from improvement of industrial competitiveness by catching up with the latest European computer technologies and toward worldwide scientific contributions through the development of leading computer technologies with all its inherent risks. Regarding this situation, the Japanese Ministry of International Trade and Industry (MITI) began study on a new project - the Fifth Generation Computer Project. This term expressed MITI's commitment to developing leading technologies that would progress beyond the fourth generation computers due to appear in the near future and which would anticipate upcoming trends. The Fifth Generation Computer Research Committee and its subcommittee were established in 1979. It took until the end of 1981 to decide on target technologies and a framework for the project. Well over one hundred meetings were held with a similar number of committee members participating. The following important near-future computer technologies were discussed: * Inference computer technologies for knowledge processing * Computer technologies to process large- scale data bases and knowledge bases * High performance workstation technologies * Distributed functional computer technologies * Super-computer technologies for scientific calculation These computer technologies were investigated and discussed from the standpoints of international contribution through the development of original Japanese technologies, the important technologies of the future, social needs and conformance with Japanese government policy for the national project. Through these studies and discussions, the committee decided on the objectives of the project by the end of 1980, and continued future studies of technical matters, social impact, and project schemes. The committee's proposals for the FGCS Project are summarized as follows: (1) The concept of the Fifth Generation Computer: to have parallel (non-Von Neumann) processing and inference processing using knowledge bases as basic mechanisms. In order to possess these mechanisms, the hardware and software interface is to be a logic program language (see Figure 1) [This is a general figure showing a hierarchy from VLSI hardware at the bottom to a Knowledge Information Processing System at the top. DKK.] (2) The objectives of the FGCS project: to develop these innovative computers which are capable of knowledge information processing and to overcome the technical restrictions of conventional computers. (3) The goals of the FGCS project: to research and develop a set of hardware and software technologies for FGCS, and to develop an FGCS prototype system consisting of a thousand element processors with inference execution speeds of between 100M LIPS and 1G LIPS (Logical Inferences Per Second). (4) R&D period for the project: estimated to be ten years, divided into three stages. * 3-year initial stage for R&D of basic technologies * 4-year intermediate stage for R&D of subsystems * 3-year final stage for R&D of total prototype system MITI decided to launch the Fifth Generation Computer System (FGCS) project as a national project for new information processing, and made efforts to acquire a budget for the project. At the same time, the international conference on FGCS '81 was prepared and held in October 1981 to announce these results and to hold discussions on the topic with foreign researchers. 2. Stages and Budgeting in the FGCS Project The FGCS project was designed to investigate a large number of unknown technologies that were yet to be developed. Since this involved a number of risky goals, the project was scheduled over a relatively long period of ten years. This ten-year period was divided into three stages. * In the initial stage (fiscal 1982 - 1984), the purpose of R&D was to develop the basic computer technologies needed to achieve the goal. * In the intermediate stage (fiscal 1984 - 1988), the purpose of R&D was to develop small to medium subsystems. * In the final stage (fiscal 1989 - 1992), the purpose of R&D was to develop a total prototype system. The final stage was initially planned to be three years. After reexamination halfway through the final stage, this stage was extended to four years to allow evaluation and improvement of the total system in fiscal year 1992. Consequently, the total length of this project has been extended to 11 years. Each year the budget for the following years R&D activities is decided. MITI made strenuous efforts in negotiating each year's budget with the Ministry of Finance. The budgets for each year, which are all covered by MITI, are shown in Figure 2 [I omit this, as it is given in the text that follows, DKK]. The total budget for the 3-year initial stage was about 8 billion yen. For the 4-year intermediate stage, it was approximately 22 billion yen. The total budget for 1989 to 1991 was around 21 billion yen. The budget for 1992 is estimated to be 3.6 billion yen. Consequently, the total budget for the 11-year period of the project will be about 54 billion yen. 3. Summary of the Project Research Results In the Fifth Generation Computer Project, two main research targets were pursued: knowledge information processing and parallel processing. Logic programming was adopted as a key technology for achieving both targets simultaneously. At the beginning of the project, we adopted Prolog as our vehicle to promote the entire research of the project. Since there were no systematic research attempts based on Prolog before our project, there were many things to do, including the development of a suitable workstation for the research, experimental studies for developing a knowledge-based system in Prolog and investigation into possible parallel architecture for the language. We rapidly succeeded in promoting research in many directions. From this research, three achievements are worth noting. The first is the development of our own workstation dedicated to ESP: Extended Self- contained Prolog. We developed an operating system for The workstation completely in ESP. The second is the application of partial evaluation to meta programming. This enabled us to develop a compiler for a new programming language by simply describing an interpreter of the language and then partially evaluating it. We applied this technique to derive a bottom-up parser for context-free grammar given a bottom up interpreter for them. In other words, partial evaluation made meta programming useful in real applications. The third achievement was the development of constraint logic programming languages. We developed two constraint logic programming languages: CIL and CAL. CIL is for natural language processing and is based on the incomplete data structure for representing "Complex Indeterminates" in situation theory. It has the capability to represent structured data like Minsky's frame and any relationship between slots' values can be expressed using constraints. CIL was used to develop a natural language understanding system called DUALS. Another constraint logic programming language, CAL, is for non-linear equations. Its inference is done using the Buchberger algorithm for computing the Grobner Basis which is a variant of the Knuth-Bendix completion algorithm for a term rewriting system. We encountered one serious problem inherent to Prolog: that was the lack of concurrency in the fundamental framework of Prolog. We recognized the importance of concurrency in developing parallel processing technologies, and we began searching for alternative logic programming languages with the notion of concurrency. We noticed the work by Keith Clark and Steve Gregory on Relational Language and Ehud Shapiro on Concurrent Prolog. These languages have a common feature of committed choice non determinism to introduce concurrency. We devoted our efforts to investigating these languages carefully and Ueda finally designed a new committed choice logic programming language called GHC, which was simpler syntax than the above two languages but still has similar expressiveness. We recognized the importance of GHC and adopted it as the core of our kernel language, KL1, in this project. The introduction of KL1 made it possible to divide the entire research project into two parts: the development of parallel hardware dedicated to KL1 and the development of software technology for the language. In this respect, the invention of GHC is the most important achievement for the success of the Fifth Generation Computer Systems project. Besides this language oriented research, we performed extensive fundamental research in the field of artificial intelligence and software engineering based on logic and logic programming. This includes research on non-monotonic reasoning, hypothetical reasoning, abduction, induction, knowledge representation, theorem proving, partial evaluation and program transformation. We expected that this research would become important application fields for our parallel machines by the affinity of these problems with logic programming and logic-based parallel processing. This is now happening. In this article, we first describe the research and development of the sequential inference machine PSI. Then, we present our research results on constraint logic programming. Finally, we discuss our research activities in the field of parallel inference from both hardware and software aspects. [Sections that are omitted detail the PSI-I (Personal Sequential Machine), Constraint Logic Programming, Parallel Inference System and features of PIM modules, KL1, and PIMOS operating system, and finally, Concurrent Logic Programming, DKK]. FGCS Follow-on Project & Forecasts 1. FGCS Follow-on Project As described in the above, the FGCS Follow-on Project is a two year project which runs from the beginning of fiscal 1993 until the end of fiscal 1994. A major role of the FGCS Follow-on Project is to promote a diffusion of parallel knowledge processing technologies that have been developed in the FGCS Project. Much of the KL1 software which aims at the provision of the new infrastructure for advanced computer research has been developed for research on parallel knowledge processing technologies in the FGCS Project. Moreover, the major software has been released as IFS. However, a sequential inference machine, PSI, or parallel inference machine, Multi-PSI or PIM, is required to execute the software. Though a "Pseudo Multi-PSI," that is, a pseudo parallel system for KL1 software, has been released as IFS, a PSI-III is required to execute it. A "PDSS", that is a KL1 programming environment on UNIX machines, has also been released as IFS, there are some limits to its efficiency and functions for executing KL1 software on it. Thus, although the PDSS system is suitable for learning KL1 language, it cannot be used to execute large KL1 software released as IFS. Therefore, it is difficult to execute the KL1 software released as IFS at hand. In the FGCS Follow-on Project a series of KL1 programming environments, including a KL1 language processor and a parallel operating system, PIMOS, shall be ported onto sequential and parallel UNIX machines so that they can be used easily at any site. These UNIX based KL1 programming environments shall be designed as machine-independent as possible. They are also planned to be released as IFS. An experimental version of the UNIX based KL1 programming environment is currently under development for evaluating an implementation scheme. Although we plan to release it as IFS in April'93, this version is for language implementation experts and is not suitable for application users since it lacks some important features for application users, such as debugging aids. The first version for application users is planned release in September '93. This version shall provide reasonable software development functions, including debugging and performance analyses. This system shall be ten times faster than the PDSS, although it is for single processor UNIX machines. The release of a KL1 programming environment for parallel UNIX machines is planned for the second quarter of '94. It shall be designed avoiding the use of machine-dependent functions. Various improvements are planned after these releases. 2. Forecasts for Some Aspects of 5G Machines LSI technologies have advance in accordance with past trends. Roughly speaking, the memory capacity and the number of gates of a single chip quadruple every three years. The number of boards for the CPU of an inference machine was more than ten for PSI-I, but only three for PSI-II, and a single board for PIM. The number of boards for 80M bytes memory was 16 for PSI-1, but only four for PSI-11, and a single board for PIM(m). Figure 1 shows the anticipated trend for board numbers for one PE (processor element: CPU and memory) and the cost of one PE based on the actual value of inference machines developed by this project. [This figure is omitted. Details are summarized in the text that follows, DKK.] The trend reveals that by the year 2000 approximately ten PEs will fit on one board, around 100 PEs will fit in one desk side cabinet, and 500 to a 1,000 PEs will fit into a large cabinet. This trend also shows that the cost of one PE will halve every three years. Figure 2 shows the performance trends for 5G machines based on the actual performance of inference machines developed by this project. [Similarly omitted, see below, DKK.] The sequential inference processing performance for one PE quadrupled every three years. The improvement in parallel inference processing performance for one PE was not as large as it was for sequential processing, because PIM performance is estimated at around two and one half times that of multi-PSI. Furthermore, Figure 2 shows the performance of one board for both sequential and parallel processing, and the performance of a conventional micro-processor with CISC and RISC technology. In this figure, future improvements in the performance of one PE are estimated to be rather lower than a linear extension of past values would indicate because of the uncertainty of whether future technology will be able to elicit such performance improvements. Performance for one board is estimated at about 20M LIPS, which is 100 times faster than PIM. Thus, a parallel machine with a large cabinet size could have 1G LIPS. These parallel systems will have the processing speeds needed for various knowledge processing applications in the near future. Several parallel applications in this project, such as CAD, theorem provers, and genetic information processing, natural language processing, and legal reasoning were described previously. These applications are distributed in various fields and aim at cultivating new parallel processing application fields. We believe that parallel machine applications will be extended to various areas in industry and society, because parallel technology will become common for computers in the near future. Parallel application fields will expand gradually according to function expansion by the use of advanced parallel processing and knowledge processing technologies. -----------------------------END OF REPORT----------------------------